Communication between stations in a data transmission network occurs through the transmission of a series, or "frame", of information characters, with adjacent frames being separated by explicit or implicit start-stop patterns. The use of a unique start pattern ("start delimiter") and a unique stop pattern ("end delimiter") allows the receiving station to identify the exact beginning and the exact end of each frame.
One type of network that has been enjoying increasing popularity is the token ring. A basic token ring network consists of a number of repeater nodes, each of which is connected by unidirectional transmission links to form a closed-loop ring. Information frames are transferred serially, bit by bit, around the ring from one repeater to the next, with each repeater regenerating and retransmitting each bit.
In addition to functioning as a retransmission element, each repeater on the ring also serves as a host station attachment point for insertion and retrieval of information by the host station. As an information frame circulates on the ring past a repeater, the frame's destination address field is compared to that of the attached host. If the host recognizes the destination address as its own, then it copies the frame.
A particular type of token ring network is defined by the Fiber Distributed Data Interface (FDDI) protocol. The FDDI protocol is an American National Standard (ANS) data transmission format which applies to a 100 Mbit/sec. token ring network that utilizes an optical fiber transmission medium. The FDDI protocol is intended as a high performance interconnection between a number of host computer systems as well as between the computers and their associated mass storage subsystems and other peripheral equipment.
As described by William Stallings, Handbook of Computer-Communication Standards, Volume 2, Howard W. Sims & Company, 1987, pp. 177-179, the FDDI token ring technique is based on the use of a small token frame that circulates around the ring when all stations are idle. A station wishing to transmit must wait until it detects a token passing by. It then captures the token by aborting token transmission as soon as the usable token is identified. After the token has been captured, the station is granted control of the transmission medium for up to a specified maximum time period during which it may transmit one or more frames onto the ring.
Information is transmitted on an FDDI ring in frames that consist of a sequence of 5-bit characters or "symbols", each symbol representing 4 data bits or control code. Information is typically transmitted in symbol pairs or "bytes".
FIG. 1 shows the fields which are used within the FDDI frame and token formats. A preamble field (PA), which consists of a sequence of Idle line-state symbols, precedes every transmission. The Start Delimiter field (SD) consists of a two control symbol start delimiter pair which is uniquely recognizable independent of symbol boundaries. As stated above, the Start Delimiter byte establishes the boundaries for the information that follows. The Frame Control field (FC) defines the type of frame and its characteristics; it distinguishes synchronous from asynchronous transmission, specifies the length of the address and identifies the type of frame. The Frame Control field uniquely distinguishes a token. The Ending Delimiter field (ED) of a token consists of two end delimiter control symbols and completes a token. The Destination Address (DA) and Source Address (SA) fields contain the destination and source addresses of the transmitted frame. The Destination Address field and the Source Address field are both either two bytes long or six bytes long, as determined by the Frame Control field. The Destination Address may be either an individual address or a group address. The Frame Check Sequence field (FCS), which is four bytes long, contains a cyclic redundancy check using the ANS standard polynomial. The INFORMATION field, as is the case for all fields covered by the Frame Check Sequence field, consists only of data symbols. The End Delimiter of a frame is one end delimiter symbol (T) which is followed by the Frame Status field (FS) which consists of three control indicator symbols which indicate whether the addressed station has recognized is address, whether the frame has been copied, or whether any stationers detected an error in the frame. The "T" followed by three control indicators represent the minimum end delimiter required by the FDDI protocol for a non-token frame. The protocol allows for additional pairs of control symbols in the End Delimiter or an additional odd number of control symbols followed by one last "T" symbol. All conforming implementations must be able to process these extended end delimiters without truncating them. The end delimiter "T" and the two control symbols "R" and "S" are uniquely encoded and distinguishable from either normal data or Idle symbols.
FIG. 2 shows the component entities necessary for a station to be in compliance with the FDDI protocol. The required components include a Station Management function (SMT) which resides in each host station on the network to control the overall action of the station to ensure proper operation as a member of the ring. A Physical Layer Medium Dependent (PMD) function provides the fiber-optic links between adjacent stations on the ring. A Physical Layer Protocol function provides the encoding, decoding, (PHY) clocking and synchronization functions. A Media Access Control function (MAC) controls access to the transmission medium, transmitting frames to and receiving frames from the Media Access Control functions of other stations.
The PHY function simultaneously receives and transmits. The PHY function's transmit logic accepts symbols from the Media Access Control function, converts these symbols to 5-bit code groups and transmits the encoded serial stream, using the capabilities of the PMD, onto the medium. The PHY function's receive logic receives the encoded serial stream through the PMD from the medium, establishes symbol boundaries based on the recognition of a start delimiter symbol pair and forwards decoded symbols to its associated Media Access Control function.
Additional information regarding the FDDI protocol is presented by Floyd E. Ross, "FDDI--an Overview", Digest of Papers, Computer Soc. Intl. Conf., Compcon '87, pp. 434-444, which is hereby incorporated by reference to provide additional background information relating to the present invention.
FIG. 3 shows a set of elements which cooperate to provide an integrated interface between an FDDI token ring and the MAC function.
A clock recovery device 10 extracts a 125 MHz clock from an incoming serial bit stream placed on the FDDI fiber optic transmission medium by the upstream station on the ring.
From a 12.5 MHz crystal reference, a clock distribution device 12 synthesizes the various clocks required by a Physical Layer Controller (Player) 14 and a basic Media Access Controller (BMAC) 16.
The Player 14 converts the 12.5 Mbyte/sec. stream retrieved from the BMAC 16 and decodes the incoming 4B/5B data into the internal code.
The BMAC 16 controls the transmitting, receiving, repeating and stripping of FDDI tokens and frames.
As shown in FIG. 4, the BMAC 16 includes a ring engine 18, a control interface 20, a PHY interface 22 and a MAC interface 24.
The ring engine 18 is the "heart" of the BMAC 16, implementing the ANS X3T9.5 MAC protocol for transmitting, receiving, repeating and stripping frames on the FDDI ring.
The control interface 20 implements the interface to the Control Bus (see FIG. 3) by which to initialize, monitor and diagnose the operation of the BMAC 16.
The PHY interface 22 provides a byte stream to the Player 14 via the PHY Request bus and receives a byte stream from the Player 14 via the PHY Indicate bus.
The MAC interface 24 provides the interface to the station's external buffering and control logic. A byte stream is provided to the buffering and control logic with appropriate control signals via the MAC Indicate bus. A byte stream is provided to the MAC interface with appropriate handshake control signals via the MAC Request bus.
Referring to FIG. 5, the ring engine 18 includes two major blocks, a receiver 26 and a transmitter 28, which share time/counter logic 30 and a MAC parameter RAM 32.
The receiver 26 validates information from the FDDI ring, detects errors and failures, and produces appropriate control signals and flags that are used by the transmitter 28 and presented to the MAC interface 24. In addition, the receiver 26 delineates frames, tokens and fragments from the byte stream received on the PHY Indicate bus based upon identification of start and end delimiters.
The MAC parameter RAM 32 is a dual-ported RAM that, as implied, contains parameters such as the address of the associated station. The receiver 26 uses the values stored in parameter RAM 32 to compare received addresses with its addresses. The transmitter 28 also uses the parameter RAM 32 for generating the source address (SA) for all frames generated by the host station.
The transmitter 28 repeats frames from other stations on the ring and inserts frames from its associated host station into the ring in accordance with the FDDI timed-token MAC protocol. The transmitter 28 uses information provided by the receiver 26 to decode whether to repeat, strip or generate a frame. The transmitter 2B continues to repeat frames until a transmission request is conveyed by the host station to the ring engine 18.
A transmission request includes the requested service class (i.e., synchronous or asynchronous) and the type of token to capture and or issue. As stated above, a station gains the right to transmit by capturing the token. Once a token has been captured, the ring engine 18 waits until the data is ready to be transmitted by the station. As a frame is transmitted, it passes along the ring, with each sequential station inspecting it a byte at a time. The frame is repeated at every station and is eventually stripped by the station that originally transmitted the frame.
As further shown in FIG. 5, the transmitter 28 includes a transmitter state machine (TSM) 34, an FCS generator 36, a ROM 38 and multiplexing logic 40 for controlling the sourcing of data to the ring.
The transmitter state machine 34 provides sequencing through the fields of a frame that is to be transmitted to the ring.
The FCS generator 36 calculates the 32-bit CRC and appends it to the information from the data stream.
The ROM 38 is used to generate control symbol pairs that are transmitted with the frame as the End Delimiter and Frame Status fields.
The output multiplexer 40 is used to select the source of information to be placed on the PHY Request bus. As stated above, this information is either repeated from the PHY Indicate bus or independently generated by the associated station. Information can be generated either from the data stream, the ROM 38, the FCS generator 36 or from the parameter RAM 32.
The timer/counter block 30 includes all of the timers required to implement the ANS X3T9.5 MAC standard as well as several event counters. It also includes the token timing logic required for implementation of the FDDI timed-token protocol.
Referring to FIG. 6, the token timing logic 42 is controlled by the transmitter 28.
A token rotation timer (TRT) 44 is used to time token rotations on the ring from arrival to arrival. The longer the rotation time, the greater the amount of load on the ring. The timers in the token timing logic shown in FIG. 6 are implemented as up-counters that increment every 80 ns. The counters are reset by loading the twos complement of the threshold. This allows a simple carry to denote timer expiration.
A token holding timer (THT) 46 is used to limit the amount of ring bandwidth used by the station for asynchronous transmission after the token is captured by the station. Before each frame is transmitted, the value of THT is used to determine if the captured token is still usable for transmission. A token is usable for asynchronous traffic if THT has not reached the selected threshold.
Four asynchronous thresholds are supported by the BMAC 16; three are programmable and one is fixed at a negotiated target token rotation time (TTRT). Requests to transmit frames at one of the priority thresholds are serviced when the token holding timer 46 has not reached the selected threshold. When TRT reaches zero, a Late Flag is set indicating that the token is late. While the Late Flag is set, no asynchronous frames may be transmitted, but the token is available for synchronous transmission.
On an early token arrival, that is, the token arrives and the Late Flag is not set, TRT is loaded with a negotiated target token rotation time TTRT and counts up. On a late token arrival, i.e., the token arrives and the Late Flag is set, the Late Flag is cleared and TRT continues to count. When TRT expires then the Late Flag is not set, the Late Flag is set and TRT is loaded with TTRT. Accumulated lateness is implemented precisely as defined in the ANSI X3T9.5 MAC standard.
THT follows the value of TRT until a token is captured. When the token is captured, TRT may be reloaded with TTRT, while THT continues to count from its previous value (THT does not wraparound). THT increments when enabled. The incrementing of THT is disabled during synchronous transmission, for example. THT is used to determine if the token is usable for asynchronous requests. For these purposes, the token is considered as late 1-byte before it is actually late (to promote interoperability with less careful implementations).
Asynchronous threshold comparisons are pipelined, so a threshold crossing may not be detected immediately. However, the possible error is a fraction of the precision of the threshold values.
Should TRT expire while the Late Flag is set, TRT is loaded with TMAX and the recovery process is invoked, unless the inhibit recovery required option is set. The recovery required condition becomes true one byte time after TRT expires, also to promote interoperability with less careful implementations. When TRT expires and the ring is not operational, TRT is loaded with TMAX. TRT is also loaded with TMAX on a reset.
Additional information regarding the BMAC 16 is provided in the following co-pending U.S. patent applications, each of which is commonly-assigned with the present application to National Semiconductor Corporation:
1. Ser. No. 436,212, filed Nov. 14, 1989 by Hamstra for RAM-based Events Counter Apparatus and Method, now U.S. Pat. No. 5,089,957; PA1 2. Ser. No. 445,964, filed Dec. 4, 1989 by Perloff for Apparatus and Method for Accessing a Cyclic Redundancy Error Check Code Generated in Parallel, now abandoned; PA1 3. Ser. No. 444,628, filed Dec. 1, 1989 by Grow et al. for Asynchronous Priority Select Logic, now U.S. Pat. No. 5,051,986; and PA1 4. Co-pending Ser. No. 444,537, filed Dec. 1, 1989 by Grow for Ring Latency Timer.
The four above-mentioned applications are hereby incorporated by reference to provide additional background information relating to the subject invention.